Low Jitter and Skew 10 to 140 MHz Zero Delay Buffer (ZDB)

Description The SL2305 is a low skew, low jitter and low power Zero Delay Buffer (ZDB) designed to produce up to five (5) clock outputs from one (1) reference input clock for high speed clock distribution applications. The product has an on-chip PLL which locks to the input clock at CLKIN and rec

Low Jitter and Skew 10 to 140 MHz Zero Delay Buffer

Description The SL2305 is a low skew, low jitter and low power Zero Delay Buffer (ZDB) designed to produce up to five (5) clock outputs from one (1) reference input clock for high speed clock distribution applications. The product has an on-chip PLL which locks to the input clock at CLKIN and rec

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC BUFFER 140MHZ 5CH 3.3V 8SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

CY2305 and CY2309 as PCI and SDRAM Buffers

Functional Description The CY2309 is a low-cost 3.3V zero delay buffer designed to distribute high-speed clocks and is available in a 16-pin SOIC or TSSOP package. The CY2305 is an 8-pin version of the CY2309. It accepts one reference input, and drives out five low-skew clocks. The -1H versions o

LOW-COST 3.3V ZERO DELAY BUFFER

Functional Description The CY2309 is a low-cost 3.3V zero delay buffer designed to distribute high-speed clocks and is available in a 16-pin SOIC or TSSOP package. The CY2305 is an 8-pin version of the CY2309. It accepts one reference input, and drives out five low-skew clocks. The -1H versions o

Low-Cost 3.3V Zero Delay Buffer

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Low Cost 3.3V Zero Delay Buffer

文件：380.35 Kbytes Page：15 Pages

Low Cost 3.3-V Zero Delay Buffer

文件：490.62 Kbytes Page：19 Pages