ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/ JITTER ATTENUATOR

Features  Generates any frequency from 2 kHz to 945 MHz and select frequencies to 1.4 GHz from an input frequency of 2 kHz to 710 MHz  Ultra-low jitter clock outputs as low as 290 fs rms (12 kHz–20 MHz), 320 fs rms (50 kHz–80 MHz)  Integrated loop filter with selectable loop bandwidth

PRECISION CLOCK JITTER ATTENUATOR

Features  Fixed frequency jitter attenuator with selectable clock ranges at 19, 38, 77, 155, 311, and 622 MHz (710 MHz max)  Support for SONET, 10GbE, 10GFC, and corresponding FEC rates  Ultra-low jitter clock output with jitter generation as low as 0.3 psRMS (50 kHz–80 MHz)  Integr

PRELIMINARY DATA SHEET PRECISION CLOCK JITTER ATTENUATOR

Description The Si5316 is a low jitter, precision jitter attenuator for high-speed communication systems, including OC-48, OC-192, 10G Ethernet, and 10G Fibre Channel. The Si5316 accepts dual clock inputs in the 19, 38, 77, 155, 311, or 622 MHz frequency range and generates a jitter-attenuated cl

Pin-Controlled 1_710 MHz Jitter Cleaning Clock

Description The Si5317 is a flexible 1:1 jitter cleaning clock for high-performance applications that require jitter attenuation without clock multiplication. The Si5317 accepts a single clock input ranging from 1 to 710 MHz and generates two low jitter clock outputs at the same frequency. The cl

Jitter Attenuator Clock Multiplier

The Si5316 jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s), 1 output(s) and has a maximum frequency output of 710 MHz. The Si531

PRELIMINARY DATA SHEET PRECISION CLOCK JITTER ATTENUATOR

Description The Si5316 is a low jitter, precision jitter attenuator for high-speed communication systems, including OC-48, OC-192, 10G Ethernet, and 10G Fibre Channel. The Si5316 accepts dual clock inputs in the 19, 38, 77, 155, 311, or 622 MHz frequency range and generates a jitter-attenuated cl

PRECISION CLOCK JITTER ATTENUATOR

Features  Fixed frequency jitter attenuator with selectable clock ranges at 19, 38, 77, 155, 311, and 622 MHz (710 MHz max)  Support for SONET, 10GbE, 10GFC, and corresponding FEC rates  Ultra-low jitter clock output with jitter generation as low as 0.3 psRMS (50 kHz–80 MHz)  Integr

封装/外壳：36-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC PREC JITTER ATTENUATOR 36-QFN 集成电路（IC） 时钟发生器，PLL，频率合成器

封装/外壳：36-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC PREC JITTER ATTENUATOR 36-QFN 集成电路（IC） 时钟发生器，PLL，频率合成器

The Si531x/2x Any-Frequency Precision Clocks

文件：1.62341 Mbytes Page：26 Pages

Quad Channel 155 Mbit/s SONET/SDH Framer and Aligner

Features General • Monolithic four channel SONET/SDH Payload Extractor/Aligner for use in STS-3 (STM-1/AU-3) or STS-3c (STM-1/AU-4) interface applications, operating at serial interface speeds of 155.52 Mbit/s. • Provides integrated clock recovery and clock synthesis for direct interfacing with

Digital Alarm Clock

文件：224.42 Kbytes Page：5 Pages

Digital Alarm Clock

文件：224.42 Kbytes Page：5 Pages

SONET/SDH Payload Extractor/Aligner(4 x 155 Mbit/s)

文件：2.53244 Mbytes Page：491 Pages

SONET/SDH Payload Extractor/Aligner(4 x 155 Mbit/s)

文件：2.53244 Mbytes Page：491 Pages