High-Speed, 0.01 Hybrid Sample/Hold

PRODUCT OVERVIEW The SHM-43 sample-hold utilizes a proprietary architecture in delivering an acquisition time of 35 nanoseconds maximum to 0.01 and 20 nanosec onds maximum to 0.1 accuracy. Operation requires +15V and ±5V supplies and the analog input range is ±2V. Packaged in a small 14-pin

High-Speed, 0.01 Hybrid Sample/Hold

文件：117.79 Kbytes Page：4 Pages

High-Speed, 0.01 Hybrid Sample/Hold

PRODUCT OVERVIEW The SHM-43 sample-hold utilizes a proprietary architecture in delivering an acquisition time of 35 nanoseconds maximum to 0.01 and 20 nanosec onds maximum to 0.1 accuracy. Operation requires +15V and ±5V supplies and the analog input range is ±2V. Packaged in a small 14-pin

High-Speed, 0.01 Hybrid Sample/Hold

PRODUCT OVERVIEW The SHM-43 sample-hold utilizes a proprietary architecture in delivering an acquisition time of 35 nanoseconds maximum to 0.01 and 20 nanosec onds maximum to 0.1 accuracy. Operation requires +15V and ±5V supplies and the analog input range is ±2V. Packaged in a small 14-pin

High-Speed, 0.01% Hybrid Sample/Hold

PRODUCT OVERVIEW\nThe SHM-43 sample-hold utilizes a proprietary architecture in delivering an acquisition time of 35 nanoseconds maximum to 0.01% and 20 nanosec onds maximum to 0.1% accuracy.\nOperation requires +15V and ±5V supplies and the analog input range is ±2V. Packaged in a small 14- ■ 35 nSec maximum acquisition time to 0.01%\n■ 30 nSec maximum hold-mode settling to 0.01%\n■ 1 pSec aperture uncertainty\n■ 150 MHz small-signal bandwidth\n■ 545 mW power dissipation\n■ Small 14-pin DIP package\n■ CMOS control signal ;

Sample and Hold Amplifiers

文件：103.41 Kbytes Page：1 Pages

High-Speed, 0.01 Hybrid Sample/Hold

文件：117.79 Kbytes Page：4 Pages

High-Speed, 0.01 Hybrid Sample/Hold

文件：117.79 Kbytes Page：4 Pages

Sample and Hold Amplifiers

文件：103.51 Kbytes Page：1 Pages

Sample and Hold Amplifiers

文件：103.24 Kbytes Page：1 Pages

High-Speed, 0.01 Hybrid Sample/Hold

文件：117.79 Kbytes Page：4 Pages