PLL FOR DTS

DESCRIPTION The SC9256 is phase-locked loop (PLL) LSIs for digital tuning systems (DTS) with built in 2 modulus prescalers. All functions ate controlled through 3 serial bus lines. These LSIs are used to configure high-performance digital tuning system. FEATURES * Optimal for configu

PLL FOR DTS

DESCRIPTION\nThe SC9256 is phase-locked loop (PLL) LSIs for digital tuning systems (DTS) with built in 2 modulus prescalers.\nAll functions ate controlled through 3 serial bus lines. These LSIs are used to configure high-performance digital tuning system.FEATURES\n* Optimal for configuring digital t * Optimal for configuring digital tuning systems in high-fi tuners and car stereos.\n* built-in prescalers. Operate at input frequency ranging from 30~150 MHz during FMIN input (with 2 modulus prescaler) and at 0.5~40MHz during AMIN input (with 2 modulus prescaler or direct dividing).\n* 16 bit prog;

133MHZ SAW Filter

The DW9256 has been designed specifically for the Personal Communications market, as an IF filter with a centre frequency of 133MHz. The filter utilises Mitel Semiconductors low loss Transversal filter technology based on a Quartz substrate for excellent temperature stability. FEATURES ■ 133MHz

SEMICONDUCTOR TECHNICAL DATA

CMOS DIGITAL INTEGRAED CIRCUIT PLL FOR DTS

PLL FOR DTS

文件：1.41187 Mbytes Page：33 Pages

PLL FOR DTS

文件：1.41187 Mbytes Page：33 Pages