SB3N551: Clock / Data Fanout Buffer, 1:4, 3.3 V, with CMOS Outputs

The SB3N551 is a low skew 1-to 4 clock fanout buffer, designed for clock distribution in mind. The NB3N551 specifically guarantees low output-to-output skew. Optimal design, layout and processing minimize skew within a device and from device to device. The output enable (OE) pin three-states the out Input/Output clock frequency up to 160 MHz\nMultiply the low frequency output of inexpensive crystals to the full system frequency\nLow Skew Ouptuts (250ps)\nMinimize timing deviations and synchronization issues\nOutput Enable puts device in three-state mode\nCreates a high impedance output with no ;

Ultra-Low Skew 1:4 Clock Fanout Buffer

文件：81.5 Kbytes Page：6 Pages

Ultra-Low Skew 1:4 Clock Fanout Buffer

文件：81.5 Kbytes Page：6 Pages

Ultra-Low Skew 1:4 Clock Fanout Buffer

文件：81.5 Kbytes Page：6 Pages

3.3 V / 5.0 V Ultra-Low Skew 1:4 Clock Fanout Buffer

文件：116.83 Kbytes Page：5 Pages

3.3 V / 5.0 V Ultra-Low Skew 1:4 Clock Fanout Buffer

文件：116.83 Kbytes Page：5 Pages

Ultra-Low Skew 1:4 Clock Fanout Buffer

文件：134.92 Kbytes Page：7 Pages