Integrated MPEG2 AVG decoder

The SAA7201 is an MPEG2 decoder which combines audio decoding and video decoding. Additionally to these basic MPEG functions it also provides means for enhanced graphics and/or on-screen display. Due to an optimized architecture for audio and video decoding, maximum capacity in the ext

Integrated MPEG2 AVG decoder

The SAA7201 is an MPEG2 decoder which combines audio decoding and video decoding. Additionally to these basic MPEG functions it also provides means for enhanced graphics and/or on-screen display. Due to an optimized architecture for audio and video decoding, maximum capacity in the ext

256 x 9, 512 x 9, 1K x 9 CMOS FIFO

Descriptions The MS7200L/7201AL/7202AL are dual-port static RAM based CMOS First-In/First-Out (FIFO) memories organized in nine-bit wide words. The devices are configured so that data is read out in the same sequential order that it was written in. Additional expansion logic is provided to allow

MICROPOWER LOW-DROPOUT LDO VOLTAGE REGULATORS

文件：623.53 Kbytes Page：36 Pages

MICROPOWER LOW-DROPOUT LDO VOLTAGE REGULATORS

文件：623.53 Kbytes Page：36 Pages