HyperRAM (Self-Refresh DRAM) 3.0 V/1.8 V, 64-Mbit, Automotive-E (Grade 1)

Features Interface • HyperBus Interface • 1.8 V / 3.0 V interface support - Single-ended clock (CK) - 11 bus signals - Optional differential clock (CK, CK#) - 12 bus signals • Chip Select (CS#) • 8-bit data bus (DQ[7:0]) • Hardware reset (RESET#) • Bidirectional Read-Write Data Strobe (RW

PSRAM — 伪静态RAM