FEATURES

• Dual voltage detection and reset assertion

—Three standard reset threshold settings

(4.6V/2.9V, 4.6V/2.6V, 2.9V/1.6V)

—VTRIP2 programmable down to 0.9V

—Adjust low voltage reset threshold voltages

using special programming sequence

—Reset signal valid to VCC = 1V

—Monitor two voltages or detect power fail

• Battery switch backup

• VOUT: 5mA to 50mA from VCC; or 250μA from

VBATT

• Fault detection register

• Selectable power-on reset timeout

(0.05s, 0.2s, 0.4s, 0.8s)

• Selectable watchdog timer interval

(25ms, 200ms, 1.4s, off)

• Debounced manual reset input

• Low power CMOS

—25μA typical standby current, watchdog on

—6μA typical standby current, watchdog off

—1μA typical battery current in backup mode

• 4Kbits of EEPROM

—16 byte page write mode

—Self-timed write cycle

—5ms write cycle time (typical)

• Built-in inadvertent write protection

—Power-up/power-down protection circuitry

—Block lock protect 0 or 1/2, of EEPROM

• 400kHz 2-wire interface

• 2.7V to 5.5V power supply operation

• Available packages

—14 Ld SOIC, TSSOP

• Pb-free plus anneal available (RoHS compliant)

• Monitor voltages: 5V to 1.6V

• Memory security