FEATURES

• Dual voltage detection and reset assertion

—Standard reset threshold settings

See Selection table on page 2.

—Adjust low voltage reset threshold voltages

using special programming sequence

—Reset signal valid to VCC = 1V

—Monitor three voltages or detect power fail

• Independent Core Voltage Monitor (V2MON)

• Fault detection register

• Selectable power-on reset timeout (0.05s,

0.2s, 0.4s, 0.8s)

• Selectable watchdog timer interval (25ms,

200ms,1.4s, off)

• Low power CMOS

—25μA typical standby current, watchdog on

—6μA typical standby current, watchdog off

• 4Kbits of EEPROM

—16 byte page write mode

—5ms write cycle time (typical)

• Built-in inadvertent write protection

—Power-up/power-down protection circuitry

—Block lock protect none or 1/2 of EEPROM

• 400kHz 2-wire interface

• 2.7V to 5.5V power supply operation

• Available packages

—8-lead SOIC, TSSOP