位置:UPD78324LP-XXX > UPD78324LP-XXX详情

UPD78324LP-XXX中文资料

厂家型号

UPD78324LP-XXX

文件大小

632.69Kbytes

页面数量

88

功能描述

MOS INTEGRATED CIRCUIT

数据手册

下载地址一下载地址二到原厂下载

生产厂商

RENESAS

UPD78324LP-XXX数据手册规格书PDF详情

FEATURES

· Internal 16-bit architecture and external 8-bit data bus

· High-speed processing by pipeline control and instruction prefetch

• Minimum instruction execution time: 250 ns (with 16 MHz external clock in operation)

· Instruction set suitable for control operations (mPD78312 upward compatible)

• Multiply/divide instructions (16 bits ´ 16 bits, 32 bits ¸ 16 bits)

• Bit manipulation instruction

• String instruction, etc.

· On-chip high-function interrupt controller

• 3-level priority specifiable

• 3-type interrupt processing mode selectable

(Vectored interrupt function, context switching function, and macro service function)

· Variety of peripheral hardware

• Realtime pulse unit

• 8-channel, 10-bit A/D converter

• Watchdog timer

更新时间:2025-10-21 10:59:00
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