• 32-bit RISC CPU with Harvard Architecture

• 8 K iCache (2-way associative)

• Full-CAN Interface: 5 channels

• Serial Interfaces: 5 channels

- 3-wire mode: 3 channels

- UART mode: 2 channels

• Timers: 2 channels

- 16-bit multi purpose timer/event counter:

channels: 2 channels

• 10-bit resolution A/D Converter: 6 channels

• External Bus Interface (32- / 16- / 8-bit data /

24-bit address)