Features

General

• PCI Express to PCI bridge

• Transparent, Non-transparent and Opaque modes

• Efficient queuing and buffering for low latency and high

throughput

• Compliant with the following specifications:

– PCI Express Base 1.1

– PCI Express PCI/PCI-X Bridge 1.0

– PCI-to-PCI Bridge Architecture 1.2

– PCI Local Bus 3.0

– PCI Bus Power Management Interface 1.2

PCI Express

• x1 lane PCIe Interface

• Advanced error reporting capability

• End-to-end CRC check and generation

• Up to four outstanding memory reads

• ASPM L0 link state power management

• Legacy interrupt signaling and MSI interrupts

• Native Hot Plug support

PCI

• 32/64-bit addressing and 32-bit data

• Operates up to 66 MHz

• Up to eight outstanding memory reads

• PCI clock outputs for up to four devices

• Four external PCI masters supported through internal arbiter

• 3.3V PCI I/Os, 5V tolerant

• MSI generation and handling using interrupt and GPIO signals