Features

• Jitter below 100fs RMS maximum (10kHz to

20MHz)

• PLL core consists of fractional-feedback Analog

PLL (APLL)

○ Operates from an integrated 78.125MHz crystal

○ APLL frequency independent of input / crystal

frequency

○ Operates as a frequency synthesizer or Digitally

Controlled Oscillator (DCO)

○ DCO has tuning granularity of < 1ppb

• Programmable status output

• 4 differential / 8 LVCMOS outputs

○ Any frequency from 10MHz to 1GHz (180MHz for

LVCMOS)

○ Programmable output buffer supports HCSL (DCcoupled), LVDS/LVPECL/CML (AC-coupled) or

two LVCMOS

○ Differential output swing is selectable: 400mV to

800mV

○ Output Enable input with programmable effect

• Supports up to 1MHz I2C or up to 20MHz SPI serial

processor port

• Can configure itself automatically after reset via

internal customer-definable One-Time

Programmable (OTP) memory with up to four

different configurations

• 4 × 4 mm 28-VFQFPN package