▪ Renesas SerDes PHY can be used for analog transceiver of following interface.

− PCI Express 3.0 / USB3.1 gen2 superspeed / Serial ATA 3.1/ 10GKR / SGMII *1

▪ Multi-link support for area reduction in using multiple SerDes

▪ Technology is TSMC 28nm HPC+ 1p10M

▪ Supply voltage can be applied 0.90V for nominal and 1.0V for overdrive of core voltage, 1.8V for IO

voltage.

▪ 3Tap FIR filter for Tx equalizer / Adaptive 5Tap DFE for Rx equalizer.

▪ Built-in differential input buffer for clean reference clock