• Dual output, 6A peak currents, can be paralleled

• Dual AND-ed input logic, (input and enable)

• Typical ON-resistance <1Ω

• Specified Miller plateau drive currents

• Very low thermal impedance (θJC = 3°C/W)

• Hysteretic Input logic levels for 3.3V CMOS, 5V

CMOS, TTL, and Logic levels proportional to VDD

• Precision threshold inputs for time delays with

external RC components

• 20ns rise and fall time driving a 10nF load.