Features List

! Single chip supports an 8 x 8 port switch at 155Mbps per

port

! Central Memory Architecture eliminates Head-of-Line

Blocking by sharing the memory array with all ports

! Low power dissipation

– 330mW (typ.)

! Data Path Interface (DPI) provides configurable Input and

Output ports; up to 8 receive and 8 transmit ports at

155Mbps

! Supports data rates up to 1.2Gbps with a 32-bit wide port

configuration; 155Mbps per 4-bit port

! Can be cascaded for larger switch configurations

! Fast Input/Output port cycle times

! Expander and Concentrator function is fully supported by

the Input and Output port configuration options

! 8192 cells (52 to 56 bytes each) of on-chip buffer memory

capacity