APPLICATIONS:

• Ideally suited for stacked DIMM DDR registered applications

• Along with CSPT857C/D, Zero Delay PLL Clock buffer, provides

complete solution for DDR1 DIMMs

FEATURES:

• 1:2 registered output buffer

• 2.3V to 2.7V operation for PC1600, PC2100, and PC2700

• 2.5V to 2.7V operation for PC3200

• Single bit propagation delay, TSSOP : 2.2ns, VFQFPN : 1.8ns

• SSTL_2 Class I style data inputs/outputs

• Differential CLK input

• RESET control compatible with LVCMOS levels

• Latch-up performance exceeds 100mA

• ESD >2000V per MIL-STD-883, Method 3015; >200V using

machine model (C = 200pF, R = 0)

• Available in 56 pin VFQFPN and 64 pin TSSOP packages