FEATURES:

• Two independent FIFO memories for fully bidirectional data

transfers

• 256 x 18 x 2 organization (IDT72605)

• 512 x 18 x 2 organization (IDT72615)

• Synchronous interface for fast (20ns) read and write cycle times

• Each data port has an independent clock and read/write control

• Output enable is provided on each port as a three-state control

of the data bus

• Built-in bypass path for direct data transfer between two ports

• Two fixed flags, Empty and Full, for both the A-to-B and the Bto-

A FIFO

• Programmable flag offset can be set to any depth in the FIFO

• The synchronous BiFIFO is packaged in a 64-pin TQFP (Thin

Quad Flatpack) and 68-pin PLCC

• Industrial temperature range (–40°C to +85°C)

• Green parts available, see ordering information