FEATURES

• 15 single ended LVCMOS/LVTTL outputs,

7Ω typical output impedance

• Selectable LVCMOS/LVTTL or LVPECL clock inputs

• CLK0 and CLK1 can accept the following input levels:

LVCMOS and LVTTL

• PCLK, nPCLK supports the following input types:

LVPECL, CML, SSTL

• Maximum input frequency: 250MHz

• Output skew: 250ps (maximum)

• Part-to-part skew: 1ns (maximum)

• Full 3.3V or mixed 3.3V core/2.5V output supply

• -40°C to 85°C ambient operating temperature

• Functionally compatible to the MPC949 in a smaller footprint

requiring less board space