General Description

The ICS854S015I-01 is a low skew, high performance 1-to-5, 2.5V,

3.3V Differential-to-LVPECL/LVDS Fanout Buffer. The

ICS854S015I-01 has two selectable differential clock inputs.

Guaranteed output and part-to-part skew characteristics make the

ICS854S015I-01 ideal for those applications demanding well defined

performance and repeatability.

Features

• Five differential LVPECL or LVDS output pairs

• Two differential clock input pairs

• CLK, nCLK pair can accept the following differential input levels:

LVDS, LVPECL, LVHSTL, HCSL

• PCLK, nPCLK can accept the following input levels: LVPECL,

LVDS, CML

• Either CLK or PCLK inputs can be configured to accept

single-ended inputs

• Maximum output frequency: 2GHz

• Additive phase jitter, RMS: 0.065ps (maximum), 3.3V,

156.25MHz, 12kHz – 5MHz)

• Output Skew: 55ps (maximum)

• Propagation delay: 570ps (typical) @ 3.3V

• Full 3.3V or 2.5V supply modes

• -40°C to 85°C ambient operating temperature