Features

• Clock frequency translator for Synchronous Ethernet

applications

• One single-ended output (LVCMOS or LVTTL levels),

16Ω output impedance

• Differential input pair (CLK, nCLK) accepts LVPECL, LVDS,

LVHSTL, SSTL, HCSL input levels

• Supports input clock frequencies of: 125MHz, 156.25MHz or

161.1328MHz

• Generates a 25MHz output clock signal

• Internal resistor bias on nCLK pin allows the user to drive CLK

input with external single-ended (LVCMOS/LVTTL) input levels

• Internal PLL is optimized for low cycle-to-cycle jitter at the

output

• Full 3.3V or 2.5V supply voltage

• -40°C to 85°C ambient operating temperature

• Available in lead-free (RoHS 6) package