Features

• Full CMOS Design

• Six Transistor Memory Cell

• Low Standby Supply Current . . . . . . . . . . . . . . . 100A

• Low Operating Supply Current . . . . . . . . . . . . . . . 20mA

• Fast Address Access Time . . . . . . . . . . . . . . . . . .150ns

• Low Data Retention Supply Voltage . . . . . . . . . . . . 2.0V

• CMOS/TTL Compatible Inputs/Outputs

• JEDEC Approved Pinout

• Equal Cycle and Access Times

• No Clocks or Strobes Required

• Gated Inputs

• No Pull-Up or Pull-Down Resistors Required

• Easy Microprocessor Interfacing

• Dual Chip Enable Control