Description

This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timing.

Features

• LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility

• High Speed Operation: tpd (Bus to Bus) = 15 ns typ (CL = 50 pF)

• High Output Current: Fanout of 15 LSTTL Loads (QA to QH outputs)

• Wide Operating Voltage: VCC = 4.5 to 5.5 V

• Low Input Current: 1 µA max

• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)