Features

Single 1.7V - 3.6V supply

Serial Peripheral Interface (SPI) compatible

Supports SPI modes 0 and 3

Supports RapidS™ operation

Supports Dual-input and Quad-input Buffer Write

Supports Dual-output and Quad-output Read

Very high operating frequencies

85 MHz (for SPI)

33 MHz (for Dual-I/O and Quad-I/O) (1)

Clock-to-output time (tV

) of 6ns maximum

User configurable page size

256 bytes per page (factory default)

264 bytes per page

Two fully independent SRAM data buffers (256/264 bytes)

Allows receiving data while reprogramming the main memory array

Flexible programming options

Byte/Page Program (1 to 256/264 bytes) directly into main memory

Buffer Write

Buffer to Main Memory Page Program

Flexible erase options

Page Erase (256/264 bytes), Block Erase (2 KB)

Sector Erase (64 KB), Chip Erase (4 Mbits)

Program and Erase Suspend/Resume

Advanced hardware and software data protection features

Individual sector protection

Individual sector lock down to make any sector permanently read-only

128-byte, One-Time Programmable (OTP) Security Register

64 bytes factory programmed with a unique identifier

64 bytes user programmable

Hardware and software controlled reset options

JEDEC Standard Manufacturer and Device ID Read

Low-power dissipation

400 nA Ultra-Deep Power-Down current (typical)

4.5 µA Deep Power-Down current (typical)

25 µA Standby current (typical)

11 mA Active Read current (typical at 20 MHz)

Endurance: 100,000 program/erase cycles per page minimum (50,000 cycles

for extended temperature option)

Data retention: 20 years

Complies with full industrial temperature range (extended temperature

optional)

Green (Pb/Halide-free/RoHS compliant) packaging options

8-lead SOIC (0.150 narrow)

8-lead EIAJ (0.208 wide)

8-pad Ultra-thin DFN (5 x 6 x 0.6mm)

Description

The AT25CY042 is a 1.7V minimum, serial-interface sequential access Flash memory ideally suited for a wide variety of

digital voice, image, program code, and data storage applications. The AT25CY042 also supports Dual-I/O, Quad-I/O

and the RapidS serial interface for applications requiring very high speed operation. Its 4,194,304 bits of memory are

organized as 2,048 pages of 256 bytes or 264 bytes each. In addition to the main memory, the AT25CY042 device also

contains two SRAM buffers of 256/264 bytes each. The buffers allow receiving of data while a page in the main memory

is being reprogrammed. Interleaving between both buffers can dramatically increase a system's ability to write a

continuous data stream. In addition, the SRAM buffers can be used as additional system scratch pad memory, and

E

2PROM emulation (bit or byte alterability) can be easily handled with a self-contained three step read-modify-write

operation.

Unlike conventional Flash memories that are accessed randomly with multiple address lines and a parallel interface, the

AT25CY042 device uses a serial interface to sequentially access its data. The simple sequential access dramatically

reduces active pin count, facilitates simplified hardware layout, increases system reliability, minimizes switching noise,

and reduces package size. The device is optimized for use in many commercial and industrial applications where highdensity, low-pin count, low-voltage, and low-power are essential.

To allow for simple in-system re-programmability, the AT25CY042 device does not require high input voltages for

programming. The device operates from a single 1.7V to 3.6V power supply for the erase and program and read

operations. The AT25CY042 device is enabled through the Chip Select pin (CS) and accessed via a 3-wire interface

consisting of the Serial Input (SI), Serial Output (SO), and the Serial Clock (SCK).

All programming and erase cycles are self-timed.