Features/Benefits

• Low-power push-pull outputs; Save power and board

space - no Rp

• Space-saving 48-pin VFQFPN package

• Fixed feedback path for 0ps input-to-output delay

• 8 OE# pins; hardware control of each output

• PLL or bypass mode; PLL can dejitter incoming clock

• 100MHz or 133MHz PLL mode operation; supports PCIe

and QPI applications

• Selectable PLL bandwidth; minimizes jitter peaking in

downstream PLL's

• Spread Spectrum Compatible; tracks spreading input

clock for low EMI

Key Specifications

• Cycle-to-cycle jitter <50ps

• Output-to-output skew <65 ps

• Input-to-output delay variation <50ps

• PCIe Gen3 phase jitter <1.0ps RMS

• QPI/UPI 9.6GT/s 12UI phase jitter