▪ SMBus Write Protect pin prevents SMBus against accidental writes

▪ 6–12 Low-power HCSL (LP-HCSL) outputs

▪ Integrated terminations eliminate up to 4 resistors per output pair

▪ Dedicated OE# pins support PCIe CLKREQ# function

▪ Up to 9 selectable SMBus addresses (9ZXL12xx,

9ZXL0853)

▪ Selectable PLL bandwidths minimizes jitter peaking

in cascaded PLL topologies

▪ Hardware/SMBus control of ZDB and FOB modes

allow change without power cycle

▪ Spread spectrum compatible

▪ 1–400MHz FOB operation (all devices)

▪ 100MHz and 133.33MHz ZDB mode (9ZXL12xx,

9ZXL08xx)

▪ 100MHz ZDB mode (9ZXL06xx)

▪ -40°C to +85°C operating temperature range

▪ Packages: See Ordering Information for more details