Description

The 89TTM55x Traffic Manager chipset consists of a 89TTM552

aggregate-flow device and a 89TTM553 per-flow device. The 89TTM55x

Traffic Manager manages bandwidth resources by shaping traffic to

defined rate profiles and by precisely controlling the allocation of bandwidth and acceptance of new traffic during times of network congestion.

The 89TTM55x provides a full suite of configurable algorithms that

support quality of service differentiation for any data protocol, at line

rates of 10 Gbps.

The 89TTM552, which can operate as a standalone device, is a 10

Gbps simplex device providing the following features:

– An aggregate-flow (AFQ) scheduler that can be used for classbased, virtual pipe, or flow scheduling for up to 4K queues.

– A logical port scheduler (1K port queues).

– Output queuing for channel-based backpressure from a

framer or fabric (1K OQs).

– Supports up to 256 MB external data buffering.

– Sophisticated congestion management features to manage

buffer resources.

– Spatial multicast labeling for the switch fabric and logical multicasting.

– Packet segmentation and reassembly across fabric or SPI4.2

channels.

– AAL-5 segmentation and reassembly

The 89TTM552 can be used in standalone mode to handle congestion management and scheduling of traffic where three levels of hierarchy and 4K queues (AFQs) are sufficient.

The 89TTM552 can perform simultaneous scheduling of a large

number of flows, each at an individual rate of fine granularity, and with

many user-configurable features allowing maximum flexibility and

performance. It has congestion management mechanisms that manage

shared traffic buffering resources. If buffer memory approaches its limit

because data arrives at a queue faster than it can depart, the 89TTM552

performs per-queue congestion management. It can also intelligently

discard lower priority traffic as it arrives until memory resources become

available.

The 89TTM552 controls traffic forwarding, manages the shared

buffer resources with multi-level thresholding, maintains the various

queues, and generates queue service selections (scheduling for departures) using bandwidth management algorithms developed by IDT.

Using industry-standard 16-bit LVDS Rx and Tx interfaces, the

89TTM552 receives and transmits data as packets or cells.

The 89TTM552 manages its data storage internally. It has fixed

blocks of memory for storing and forwarding data, and for managing

memory resources according to quality of service parameters. Each

block, or cell, contains up to 64 bytes of data payload from a packet. The

89TTM552 can process up to 35 Mcps/Mpps for both arrivals and departures. The 89TTM552 and 89TTM553 both operate up to 175 MHz.