Description

The 89TSF5xx is a complete switch fabric, consisting of two chips:

89TSF552 (queuing engine, 10 Gbps).

89TSF500 (crossbar and scheduler).

The 89TSF552 typically resides on a line card and the 89TSF500

usually resides on a separate switch card. An 89TSF552 connects with

the 89TSF500 through high-speed serial links.

The 89TSF5xx switch fabric has a modular and scalable architecture

that gives system designers maximum flexibility and performance. This

architecture allows a switch to be implemented either on a single shelf

using an electrical backplane or on multiple shelves connected by

optical transceivers, thus helping system vendors overcome physical

space constraints.

The 89TSF552 supports line card speeds up to OC-192 (full duplex).

It incorporates a 16-bit CSIX-over-LVDS interface to line card devices,

allowing the 89TSF5xx to operate seamlessly with the IDT 89TTM552

traffic manager, or other compatible traffic managers and network

processors.

In the ingress direction, the 89TSF552 manages a set of virtual

output queues (VOQs), negotiates the routing path through the switch

fabric, and transmits data to an 89TSF500. In the egress direction, the

89TSF552 receives data from an 89TSF500 and transmits the traffic,

through a CSIX-over-LVDS interface, either to IDT’s 89TTM552 traffic

manager or to another device (such as a network processor) on the line

card.

89TSF5xx Features

◆ Up to 32 switch ports, with 24 Gbps available per switch

port.

◆ Variable length CSIX payload (up to 132 bytes) that supports

any type of traffic.

◆ Virtual output queues (VOQs) in the ingress direction that

eliminate head-of-line blocking. The 256 unicast VOQs

provide:

– A maximum of 32 ports with 8 CoS, or

– A maximum of 16 ports with 4 subports and 4 CoS.

◆ Spatial multicast support with up to 4K global multicast

labels. Each multicast label can specify from 1 to 32 ports.

◆ Efficient backpressure mechanism that eliminates cell loss

caused by congestion.

◆ In-service scalable architecture.

◆ “Stackable” architecture. Total aggregate bandwidth is

linearly proportional to the number of 89TSF500s. Port rate

is configurable up to OC-192.

◆ Always non-blocking architecture across destination, traffic

type (cell, packet), and class of service (CoS).

◆ Supports up to 4 egress subports per switch port.

◆ Carrier class reliability features:

– Flexible architecture that allows the 89TSF switch fabric to be

employed in a single switch shelf or in multiple switch shelves.

– Automatic link diagnostics that detect faulty link connections.

– Both n+m (load-sharing mode) and 1:1 protection (active/

standby mode) on serial links.

– Patented error correction scheme to reduce the system bit

error rate by 105

.

– Line cord redundancy via Redundant Destination Mapping

(RDM) and Queue-Mapped Redundancy (QMR).

– Dynamic 89TSF500 rerouting that avoids congested or faulty

89TSF500s.

– Zero cell loss during controlled switchover to standby

89TSF500s.

◆ Advanced diagnostic features including multiple loopback

paths.

◆ Unicast and multicast traffic with up to 8 classes of service.

◆ Industry-standard CSIX-over-LVDS interface.

◆ Backward compatibility with IDT’s ZSF200 switch fabric.

89TSF552 Features

◆ 24 embedded SerDes links per device at 2.5 Gbps per link.

◆ Virtual output queues (VOQs) that buffer data according to

destination, traffic type and class of Service (CoS).

◆ Guaranteed cell ordering.

◆ External processor interface for status and register

configuration.

◆ Support for n+m (load-sharing) and 1:1 (active/standby)

redundancy modes.