Features

• Three differential LVDS output pairs

• Three differential LVPECL clock input pairs

• PCLKx pair can accept the following differential input levels:

LVPECL and LVDS

• Maximum output frequency: 2.5GHz

• Additive phase jitter, RMS: 0.035ps (typical)

• Propagation delay: 450ps (maximum)

• Part-to-part skew: 200ps (maximum)

• Full 2.5V supply mode

• -40°C to 85°C ambient operating temperature

• Available in lead-free (RoHS 6) package