Features

• Sixteen differential 3.3V LVPECL output pairs

• CLK, nCLK input pair

• CLK, nCLK pair can accept the following differential input

levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL

• Maximum output frequency: 500MHz

• Translates any single-ended input signal to 3.3V LVPECL levels

with a resistor bias on nCLK input

• Output skew: 75ps (maximum)

• Additive phase jitter, RMS @ 106.25MHz: 0.162ps (typical)

• Full 3.3V supply voltage

• -40°C to 85°C ambient operating temperature

• Available in lead-free (RoHS 6) package