Features

• One selectable clock for DDR 400/533/667, LVPECL/LVDS

interface levels

• Nine LVCMOS/ LVTTL outputs, 15Ω typical output impedance

• Selectable external crystal or differential input source

• Crystal oscillator interface designed for 25MHz, parallel resonant

crystal

• Differential input pair (CLK, nCLK) accepts LVPECL, LVDS, SSTL

input levels

• Internal resistor bias on nCLK pin allows the user to drive CLK

input with external single-ended (LVCMOS/ LVTTL) input levels

• Power output supply modes

LVDS and LVPECL – full 3.3V

LVCMOS – full 3.3V or mixed 3.3V core/2.5V output

• -40°C to 85°C ambient operating temperature

• Available in lead-free (RoHS 6) package