Features

◆ True Dual-Port memory cells which allow simultaneous

access of the same memory location

◆ High-speed access

– Commercial: 10/12/15ns (max.)

– Industrial: 12ns (max.)

◆ Dual chip enables allow for depth expansion without

external logic

◆ IDT70V659/58/57 easily expands data bus width to 72 bits

or more using the Master/Slave select when cascading

more than one device

◆ M/S = VIH for BUSY output flag on Master,

M/S = VIL for BUSY input on Slave

◆ Busy and Interrupt Flags

◆ On-chip port arbitration logic