Features

• Packaged in 16-pin TSSOP (173 mil)

• Supply voltages: VDD = 3.3 V, VDDO = 2.5 V

• Peak-to-peak jitter: ±125 ps typ

• Output duty cycle 45/55 (worst case)

• 25 MHz crystal or reference clock input

• Zero (0) ppm frequency error on all output clocks

• Advanced, low-power CMOS process

• Industrial temperature range (-40 to +85°C)

• Pb (lead) free package