封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：托盘 描述：IC CBRAM 64KBIT I2C 1MHZ 8SOIC 集成电路（IC） 存储器

64/32 Kbit Serial I짼C Bus EEPROM

Description The M24C32, M24C64 and M24128 devices are I2C-compatible electrically erasable programmable memories (EEPROM). They are organized as 4096 × 8 bits, 8192 × 8 bits and 16384 × 8 bits, respectively. I2C uses a two-wire serial interface, comprising a bi-directional data line and a clock

64/32 Kbit Serial I짼C Bus EEPROM

Description The M24C32, M24C64 and M24128 devices are I2C-compatible electrically erasable programmable memories (EEPROM). They are organized as 4096 × 8 bits, 8192 × 8 bits and 16384 × 8 bits, respectively. I2C uses a two-wire serial interface, comprising a bi-directional data line and a clock

64 Kbit 8192 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus

Features • Data EEPROM internally organized as 8192 bytes and 256 pages × 32 bytes • Page Protection Mode for protecting the EEPROM against unintended data changes (SLx 24C64.../P types only) • Low power CMOS • VCC = 2.7 to 5.5 V operation • Two wire serial interface bus, I2C-Bus

64 Kbit 8192 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus

Features • Data EEPROM internally organized as 8192 bytes and 256 pages × 32 bytes • Page Protection Mode for protecting the EEPROM against unintended data changes (SLx 24C64.../P types only) • Low power CMOS • VCC = 2.7 to 5.5 V operation • Two wire serial interface bus, I2C-Bus

64 Kbit 8192 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus

Features • Data EEPROM internally organized as 8192 bytes and 256 pages × 32 bytes • Page Protection Mode for protecting the EEPROM against unintended data changes (SLx 24C64.../P types only) • Low power CMOS • VCC = 2.7 to 5.5 V operation • Two wire serial interface bus, I2C-Bus