Quad. Bus Buffer Gates with 3-state Outputs

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Quad. Bus Buffer Gates with 3-state Outputs

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Quad buffer/line driver with 5 V tolerant input/outputs; 3-state

1. General description The 74LVC126A is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A LOW on nOE causes the outputs to assume a high impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

Low-Voltage CMOS Quad 2-Input NAND Gate

Low-Voltage CMOS Quad Buffer With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) The 74LVC126A is a high performance, non−inverting quad buffer operating from a 1.2 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL comp

Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state

DESCRIPTION The 74LVC126A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. The 74LVC126A consists of four non-inver

QUADRUPLE 3-STATE BUFFERS

Description The 74LVC126A provides four independent buffers with three state outputs. Each output is independently controlled by an associated output enable pin (OE) which places the device in the high impedance state when driven low. The device is designed for operation with a power supply range

Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state

DESCRIPTION The 74LVC126A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V. The 74LVC126A consists of four non-inver