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SC26C562A8A中文资料

厂家型号

SC26C562A8A

文件大小

151.88Kbytes

页面数量

22

功能描述

CMOS dual universal serial communications controller CDUSCC

数据手册

下载地址一下载地址二

简称

PHILIPS飞利浦

生产厂商

Philips Semiconductors

中文名称

荷兰皇家飞利浦官网

SC26C562A8A数据手册规格书PDF详情

DESCRIPTION

The Philips Semiconductors SC26C562 Dual Universal Serial Communications Controller (CDUSCC) is a single-chip CMOS-LSI communications device that provides two independent, multi-protocol, full-duplex receiver/transmitter channels in a single package. It supports bit-oriented and character-oriented (byte count and byte control) synchronous data link controls as well as asynchronous protocols. The SC26C562 interfaces to synchronous bus MPUs and is capable of program-polled, interrupt driven, block-move or DMA data transfers.

FEATURES

General Features

• Dual full-duplex synchronous/ asynchronous receiver and transmitter

• Multi-protocol operation

– BOP: HDLC/ADCCP, SDLC, SDLC loop, X.25 or X.75 link level, etc.

– COP: Single SYNC, dual SYNC, BiSYNC, DDCMP

– ASYNC: 5-8 bits plus optional parity

• Sixteen character receive and transmit FIFOs with interrupt threshold control

• FIFO’ed status bits

• Watchdog timer

• 0 to 10 Mbit/sec data rate

• Programmable bit rate for each receiver and transmitter selectable from:

– 19 fixed rates: 50 to 64K baud

– One user-defined rate derived from programmable counter/timer

– External 1X or 16X clock

– Digital phase-locked loop

• Parity and FCS (frame check sequence LRC or CRC) generation and checking

• Programmable data encoding/decoding: NRZ, NRZI, FM0, FM1, Manchester

• Programmable channel mode: full- or half-duplex, auto-echo, or local loopback

• Programmable data transfer mode: polled, interrupt, DMA, wait

• DMA interface

– Compatible with Synchronous and Asynchronous bus DMA controllers

– Half- or full-duplex operation

– Single or dual address data transfers

– Automatic frame termination on counter/ timer terminal count or DMA DONE (EOPN)

• Transmit path clear status

• High speed data bus interface: 160ns bus cycle

• DPLL operation up to 312.5kHz with internal clock

• Interrupt capabilities

– Vector output (fixed or modified by status)

– Individual interrupt enable bits

– Programmable internal priorities

– Maskable interrupt conditions

– 80XX/X compatible

• Multi-function programmable 16-bit counter/timer

– Bit rate generator

– Event counter

– Count received or transmitted characters

– Delay generator

– Automatic bit length measurement

• Modem controls

– RTS, CTS, DCD, and up to four general purpose I/O pins per channel

– CTS and DCD programmable auto-enables for Tx and Rx

– Programmable interrupt on change of CTS or DCD

• On-chip oscillator for crystal

• TTL compatible

• Single +5V power supply

更新时间:2025-7-30 19:06:00
供应商 型号 品牌 批号 封装 库存 备注 价格
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2015+
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