位置:PLS101A > PLS101A详情

PLS101A中文资料

厂家型号

PLS101A

文件大小

127.76Kbytes

页面数量

8

功能描述

Programmable logic arrays 16 횞 48 횞 8

数据手册

下载地址一下载地址二

生产厂商

PHI

PLS101A数据手册规格书PDF详情

DESCRIPTION

The PLS100 (3-State) and PLS101 (Open Collector) are bipolar, fuse Programmable Logic Arrays (PLAs). Each device utilizes the standard AND/OR/Invert architecture to directly implement custom sum of product equations.

FEATURES

• Field-programmable (Ni-Cr link)

• Input variables: 16

• Output functions: 8

• Product terms: 48

• I/O propagation delay: 50ns (max.)

• Power dissipation: 600mW (typ.)

• Input loading: –100µA (max.)

• Chip Enable input

• Output option:

– PLS100: 3-State

– PLS101: Open-Collector

• Output disable function:

– 3-State: Hi-Z

– Open-Collector: High

APPLICATIONS

• CRT display systems

• Code conversion

• Peripheral controllers

• Function generators

• Look-up and decision tables

• Microprogramming

• Address mapping

• Character generators

• Data security encoders

• Fault detectors

• Frequency synthesizers

• 16-bit to 8-bit bus interface

• Random logic replacement

更新时间:2025-10-10 8:22:00
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