位置:HEF4017BF > HEF4017BF详情

HEF4017BF中文资料

厂家型号

HEF4017BF

文件大小

99.22Kbytes

页面数量

8

功能描述

5-stage Johnson counter

数据手册

下载地址一下载地址二

简称

PHILIPS飞利浦

生产厂商

Philips Semiconductors

中文名称

荷兰皇家飞利浦官网

HEF4017BF数据手册规格书PDF详情

DESCRIPTION

The HEF4017B is a 5-stage Johnson decade counter with ten spike-free decoded active HIGH outputs (Oo to O9), an active LOW output from the most significant flip-flop (O5-9), active HIGH and active LOW clock inputs (CP0, CP1) and an overriding asynchronous master reset input (MR).

The counter is advanced by either a LOW to HIGH transition at CP0 while CP1 is LOW or a HIGH to LOW transition at CP1 while CP0 is HIGH (see also function table).

When cascading counters, the O5-9 output, which is LOW while the counter is in states 5, 6, 7, 8 and 9, can be used to drive the CP0 input of the next counter.

A HIGH on MR resets the counter to zero (Oo = O5-9 = HIGH; O1 to O9 = LOW) independent of the clock inputs (CP0, CP1).

Automatic code correction of the counter is provided by an internal circuit: following any illegal code the counter returns to a proper counting mode within 11 clock pulses.

Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

更新时间:2025-7-23 9:01:00
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2015+
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