DESCRIPTION

The GTL2006 is a 13-bit translator to interface between the 3.3 V LVTTL chip set I/O and the Xeon processor GTL–/GTL/GTL+ I/O. The GTL2006 is designed for platform health management in dual processor applications.

FEATURES

• Operates as a GTL–/GTL/GTL+ to LVTTL sampling receiver or LVTTL to GTL–/GTL/GTL+ driver

• 3.0 V to 3.6 V operation

• LVTTL I/O not 5 V tolerant

• Series termination on the LVTTL outputs of 30 Ω

• ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 250 V CDM per JESD22-C101

• Latch-up testing is done to JESDEC Standard JESD78 which exceeds 500 mA

• Package offered: TSSOP28