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74HCHCT4520中文资料

厂家型号

74HCHCT4520

文件大小

59.11Kbytes

页面数量

7

功能描述

Dual 4-bit synchronous binary counter

数据手册

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生产厂商

PHI

74HCHCT4520数据手册规格书PDF详情

GENERAL DESCRIPTION

The 74HC/HCT4520 are high-speed Si-gate CMOS devices and are pin compatible with the “4520” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A.

The 74HC/HCT4520 are dual 4-bit internally synchronous binary counters with an active HIGH clock input (nCP0) and an active LOW clock input (nCP1), buffered outputs from all four bit positions (nQ0 to nQ3) and an active HIGH overriding asynchronous master reset input (nMR).

The counter advances on either the LOW-to-HIGH transition of nCP0 if nCP1 is HIGH or the HIGH-to-LOW transition of nCP1 if nCP0 is LOW. Either nCP0 or nCP1 may be used as the clock input to the counter and the other clock input may be used as a clock enable input. A HIGH on nMR resets the counter (nQ0 to nQ3 = LOW) independent of nCP0 and nCP1.

FEATURES

• Output capability: standard

• ICC category: MSI

APPLICATIONS

• Multistage synchronous counting

• Multistage asynchronous counting

• Frequency dividers

更新时间:2025-12-3 14:03:00
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