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74F764-1A中文资料

厂家型号

74F764-1A

文件大小

40.88Kbytes

页面数量

3

功能描述

DRAM dual-ported controllers

数据手册

下载地址一下载地址二

生产厂商

PHI

74F764-1A数据手册规格书PDF详情

DESCRIPTION

The 74F764-1/765-1 DRAM Dual-ported Controller is a high-speed synchronous dual-port arbiter and timing generator that allows two microprocessors, microcontrollers, or any other memory accessing device to share the same block of DRAM. The device performs arbitration, signal timing, address multiplexing, and refresh address generation, replacing up to 25 discrete devices.

FEATURES

• Allows two microprocessors to access the same bank of dynamic RAM

• Performs arbitration, signal timing, address multiplexing and refresh

• 9 Address output pins allow direct control of up to 256K dynamic RAMs

• External address multiplexing enables control of 1Mbit (or greater) dynamic RAMs

• Separate refresh clock allows adjustable refresh timing

• 74F764-1 has an on-chip 18-bit address input latch

• 74F764-1/765-1 allow control of dynamic RAMs with row access times down to 40ns

• 74F764-1/765-1 output drivers designed for first reflected wave switching

更新时间:2026-1-28 16:30:00
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只做原装正品假一赔十为客户做到零风险!!
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只做全新原装进口现货
PHI
23+
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PHI
23+
NA
20000
全新原装假一赔十