DESCRIPTION

The 74F373 is an octal transparent latch coupled to eight 3-State output devices. The two sections of the device are controlled independently by enable (E) and output enable (OE) control gates.

The data on the D inputs is transferred to the latch outputs when the enable (E) input is high. The latch remains transparent to the data input while E is high, and stores the data that is present one setup time before the high-to-low enable transition.

The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors.

FEATURES

• 8-bit transparent latch — 74F373

• 8-bit positive edge triggered register — 74F374

• 3-State outputs glitch free during power-up and power-down

• Common 3-State output register

• Independent register and 3-State buffer operation

• SSOP Type II Package