位置:74AVC16834ADGV > 74AVC16834ADGV详情

74AVC16834ADGV中文资料

厂家型号

74AVC16834ADGV

文件大小

121.81Kbytes

页面数量

13

功能描述

18-bit registered driver with inverted register enable and Dynamic Controlled Outputs (3-State)

总线收发器 18-BIT REG DRIV/INV REG/DCO 3S

数据手册

原厂下载下载地址一下载地址二

生产厂商

PHI

74AVC16834ADGV数据手册规格书PDF详情

DESCRIPTION

The 74AVC16834A is a 18-bit universal bus driver. Data flow is controlled by output enable (OE), latch enable (LE) and clock inputs (CP).

This product is designed to have an extremely fast propagation delay and a minimum amount of power consumption.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor (Live Insertion).

A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line drive during transient. See the graphs on page 9 for typical curves.

FEATURES

• Wide supply voltage range of 1.2 V to 3.6 V

• Complies with JEDEC standard no. 8-1A/5/7

• CMOS low power consumption

• Input/output tolerant up to 3.6 V

• DCO (Dynamic Controlled Output) circuit dynamically changes output impedance, resulting in noise reduction without speed degradation

• Low inductance multiple VCC and GND pins for minimum noise and ground bounce

• Power off disables 74AVC16834A outputs, permitting Live Insertion

• Integrated input diodes to minimize input overshoot and undershoot

• Full PC133 solution provided when used with PCK2509S or PCK2510S and CBT16292

74AVC16834ADGV产品属性

  • 类型

    描述

  • 型号

    74AVC16834ADGV

  • 功能描述

    总线收发器 18-BIT REG DRIV/INV REG/DCO 3S

  • RoHS

  • 制造商

    Fairchild Semiconductor

  • 逻辑类型

    CMOS

  • 逻辑系列

    74VCX

  • 每芯片的通道数量

    16

  • 输入电平

    CMOS

  • 输出电平

    CMOS

  • 输出类型

    3-State

  • 高电平输出电流

    - 24 mA

  • 低电平输出电流

    24 mA

  • 传播延迟时间

    6.2 ns

  • 电源电压-最大

    2.7 V, 3.6 V

  • 电源电压-最小

    1.65 V, 2.3 V

  • 最大工作温度

    + 85 C

  • 封装/箱体

    TSSOP-48

  • 封装

    Reel

更新时间:2025-11-6 16:30:00
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