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74ALS373DB中文资料

厂家型号

74ALS373DB

文件大小

144.77Kbytes

页面数量

13

功能描述

Latch/flip-flop

数据手册

下载地址一下载地址二

生产厂商

PHI

74ALS373DB数据手册规格书PDF详情

DESCRIPTION

The 74ALS373 is an octal transparent latch coupled to eight 3-State output devices. The two sections of the device are controlled independently by enable (E) and output enable (OE) control gates.

The data on the D inputs is transferred to the latch outputs when the enable (E) input is High. The latch remains transparent to the data input while E is High, and stores the data that is present one setup time before the High-to-Low enable transition.

The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors.

FEATURES

• 8-bit transparent latch – 74ALS373

• 8-bit positive edge triggered register – 74ALS374

• 3-State output buffers

• Common 3-State output register

• Independent register and 3-State buffer operation

更新时间:2025-11-24 16:07:00
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