Description

The PI6C103 is a high-speed, low-noise clock generator designed to work with the PI6C18X clock buffer to meet all clock needs for Mobile Intel Architecture platforms. System clock frequencies of 66.6 MHz and 100 MHz are supported.

Split supplies of 3.3V and 2.5V are used. The 3.3V power supply powers everything except the CPU clock. The 2.5V power supply is used to power the CPUCLK outputs. 2.5V signaling follows JEDEC standard 8-X. Power sequencing of the 3.3V and 2.5V supplies is not required.

Features

• Two copies of CPU clock

• 100 MHz or 66.6 MHz operation

• Six copies of PCI clock, (synchronous with CPU clock)

• Two copies of REF clock @ 14.31818 MHz

• One copy of 48 MHz

• One copy of selectable 48/24 MHz

• Power management control input pins

• Isolated core VDD, VSS pins for noise reduction

• 28-pin SSOP (H) and TSSOP (L) packages