CMOS System Reset

Outline This IC is a system reset IC developed using the CMOS process. Super low consumption current of 0.25µA typ. has been achieved through use of the CMOS process. Also, detection voltage is high precision detection of ±2. Features 1. Super low consumption current 0.25µA typ. (when VDD

IC for CMOS System Reset

Outline This IC is a system reset IC developed using the CMOS process. Super low consumption current of 0.25µA typ. has been achieved through use of the CMOS process. Also, detection voltage is high precision detection of ±2. Features 1. Super low consumption current 0.25µA typ. (when VDD

DUAL TIMING CIRCUIT

Dual Timing Circuit The MC3456 dual timing circuit is a highly stable controller capable of producing accurate time delays, or oscillation. Additional terminals are provided for triggering or resetting if desired. In the time delay mode of operation, the time is precisely controlled by one

N-Channel PowerTrench MOSFET

General Description These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor’s advanced Power Trench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage

짹15kV ESD-Protected USB Transceivers

文件：366.6 Kbytes Page：19 Pages

짹15kV ESD-Protected USB Transceivers

文件：366.6 Kbytes Page：19 Pages

Channelized T3 Termination with DS3 Framer, M13 Multiplexer, T1/ E1 Framers and 256 Channel HDLC/PPP controller

文件：5.2862 Mbytes Page：424 Pages