CMOS System Reset

Outline This IC is a system reset IC developed using the CMOS process. Super low consumption current of 0.25µA typ. has been achieved through use of the CMOS process. Also, detection voltage is high precision detection of ±2. Features 1. Super low consumption current 0.25µA typ. (when VDD

IC for CMOS System Reset

Outline This IC is a system reset IC developed using the CMOS process. Super low consumption current of 0.25µA typ. has been achieved through use of the CMOS process. Also, detection voltage is high precision detection of ±2. Features 1. Super low consumption current 0.25µA typ. (when VDD

Single P-Channel Logic Level PowerTrench MOSFET

General Description This P-Channel Logic Level MOSFET is produced using Fairchild’s advanced PowerTrench process. It has been optimized for battery power management applications. Features • –3.6 A, –30 V. RDS(ON) = 75 mΩ @ VGS = –10 V RDS(ON) = 125 mΩ @ VGS = –4.5 V • Low gate charge

Dual DC/DC Converter with USB Power Manager and Li-Ion Battery Charger

文件：516.9 Kbytes Page：24 Pages

Dual DC/DC Converter with USB Power Manager and Li-Ion Battery Charger

文件：516.9 Kbytes Page：24 Pages

짹15kV ESD-Protected USB Transceivers

文件：366.6 Kbytes Page：19 Pages

짹15kV ESD-Protected USB Transceivers

文件：366.6 Kbytes Page：19 Pages