Zero-Delay Clock Buffer

Description ThePI6C2409-1H is aPLL based, zero-delay buffer, with the ability to distribute nine outputs of up to 133 MHz at 3.3V. All the outputs are distributed from a single clock input CLKIN and output OUT0 performs zero delay by connecting a feedback to PLL. PI6C2409-1H has two banks of fou

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC ZERO DELAY CLOCK BUFF 16TSSOP 集成电路（IC） 时钟发生器，PLL，频率合成器

Zero-Delay Clock Buffer

Description ThePI6C2409-1H is aPLL based, zero-delay buffer, with the ability to distribute nine outputs of up to 133 MHz at 3.3V. All the outputs are distributed from a single clock input CLKIN and output OUT0 performs zero delay by connecting a feedback to PLL. PI6C2409-1H has two banks of fou

Zero-Delay Clock Buffer

Functional Description The PI6C2409 is a PLL based, zero-delay buffer, with the ability to distribute nine outputs of up to 133MHz at 3.3V. All the outputs are distributed from a single clock input CLKIN and output OUT0 performs zero delay by connecting a feedback to PLL. PI6C2409 has two banks

Zero-Delay Clock Buffer

Description ThePI6C2409-1H is aPLL based, zero-delay buffer, with the ability to distribute nine outputs of up to 133 MHz at 3.3V. All the outputs are distributed from a single clock input CLKIN and output OUT0 performs zero delay by connecting a feedback to PLL. PI6C2409-1H has two banks of fou

Zero-Delay Clock Buffer

Description ThePI6C2409-1H is aPLL based, zero-delay buffer, with the ability to distribute nine outputs of up to 133 MHz at 3.3V. All the outputs are distributed from a single clock input CLKIN and output OUT0 performs zero delay by connecting a feedback to PLL. PI6C2409-1H has two banks of fou