50 V, 100 mA NPN resistor-equipped transistors

Features and benefits • 100 mA output current capability • Built-in resistors • Simplifies circuit design • Reduces component count • Reduces pick and place costs • Low package height of 0.5 mm • Suitable for Automatic Optical Inspection (AOI) of solder joint

丝印代码：8H；50 V, 100 mA PNP resistor-equipped transistors

Features and benefits • 100 mA output current capability • Built-in resistors • Simplifies circuit design • Reduces component count • Reduces pick and place costs • Low package height of 0.5 mm • Suitable for Automatic Optical Inspection (AOI) of solder joint

50 V, 100 mA PNP resistor-equipped transistors

100 mA PNP Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks.\nTable 1. Product overview Type number\n R1\n R2\n Package\n NPN complement:\n kΩ\n kΩ\n Nexperia\n • 100 mA output current capability\n• Built-in resistors\n• Simplifies circuit design\n• Reduces component count\n• Reduces pick and place costs\n• Low package height of 0.5 mm\n• Suitable for Automatic Optical Inspection (AOI) of solder joint;

50 V, 100 mA PNP resistor-equipped transistors

100 mA PNP Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks.\nTable 1. Product overview Type number\n R1\n R2\n Package\n NPN complement:\n kΩ\n kΩ\n Nexperia\n • 100 mA output current capability\n• Built-in resistors\n• Simplifies circuit design\n• Reduces component count\n• Reduces pick and place costs\n• Low package height of 0.5 mm\n• Suitable for Automatic Optical Inspection (AOI) of solder joint\n• Qualified according to AEC-Q101 and recommended for u;

50 V, 100 mA PNP resistor-equipped transistors

1. General description 100 mA PNP Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks. Table 1. Product overview Type number R1 R2 Package kΩ kΩ Nexperia JEDEC NPN complement: PDTA14

50 V, 100 mA NPN resistor-equipped transistors

1. General description 100 mA NPN Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks. Table 1. Product overview Type number R1 R2 Package kΩ kΩ Nexperia JEDEC PNP complement: PDTC14

50 V, 100 mA PNP resistor-equipped transistors

1. General description 100 mA PNP Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks. 2. Features and benefits • 100 mA output current capability • Built-in resistors • Simplifies

50 V, 100 mA NPN resistor-equipped transistors

Features and benefits • 100 mA output current capability • Built-in resistors • Simplifies circuit design • Reduces component count • Reduces pick and place costs • Low package height of 0.5 mm • Suitable for Automatic Optical Inspection (AOI) of solder joint • Qualified according to AEC-Q

丝印代码：8H；50 V, 100 mA PNP resistor-equipped transistors

1. General description 100 mA PNP Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks. Table 1. Product overview Type number R1 R2 Package kΩ kΩ Nexperia JEDEC NPN complement: PDTA14

50 V, 100 mA PNP resistor-equipped transistors

1. General description 100 mA PNP Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks. 2. Features and benefits • 100 mA output current capability • Built-in resistors • Simplifies

50 V, 100 mA PNP resistor-equipped transistors

1. General description 100 mA PNP Resistor-Equipped Transistor (RET) family in an ultra small DFN1412D-3 (SOT8009) leadless Surface-Mounted Device (SMD) plastic package with side-wettable flanks. Table 1. Product overview Type number R1 R2 Package kΩ kΩ Nexperia JEDEC NPN complement: PDTA14

封装/外壳：3-XDFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：PDTA144EQC-Q/SOT8009/DFN1412D- 分立半导体产品 晶体管 - 双极（BJT）- 单，预偏置

封装/外壳：3-XDFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：PDTA144EQC/SOT8009/DFN1412D-3 分立半导体产品 晶体管 - 双极（BJT）- 单，预偏置

PNP resistor-equipped transistor

DESCRIPTION PNP resistor-equipped transistor (see “Simplified outline, symbol and pinning” for package details). FEATURES • Built-in bias resistors • Simplified circuit design • Reduction of component count • Reduced pick and place costs. APPLICATIONS • General purpose switching and amplif

PNP resistor-equipped transistor

DESCRIPTION PNP resistor-equipped transistor (see “Simplified outline, symbol and pinning” for package details). FEATURES • Built-in bias resistors • Simplified circuit design • Reduction of component count • Reduced pick and place costs. APPLICATIONS • General purpose switching and amplif

PNP SILICON BIAS RESISTOR TRANSISTOR

This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. The

NPN SILICON BIAS RESISTOR TRANSISTORS

Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolit

Bias Resistor Transistor

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