PNP resistor-equipped transistor; R1 = 100 kΩ, R2 = 100 kΩ

PNP Resistor-Equipped Transistor (RET) in a leadless ultra small DFN1006B-3 (SOT883B) Surface-Mounted Device (SMD) plastic package. NPN complement: PDTC115EMB. • 20 mA output current capability\n• Reduces component count\n• Built-in bias resistors\n• Reduces pick and place costs\n• Simplifies circuit design\n• AEC-Q101 qualified\n• Leadless ultra small SMD plastic package\n• Low package height of 0.37 mm;

丝印代码：00100000；PNP resistor-equipped transistor; R1 = 100 k廓, R2 = 100 k廓

文件：960.46 Kbytes Page：12 Pages

封装/外壳：3-XFDFN 包装：卷带（TR） 描述：TRANS PREBIAS PNP 50V DFN1006B-3 分立半导体产品 晶体管 - 双极（BJT）- 单，预偏置

POWER TRANSISTORS(2.0A,60-100V,50W)

DARLINGTON 2 AMPERE COMPLEMENTARY SILICON POWER TRANSISTORS

Quad, Closed-Loop Monolithic Buffer

文件：350.02 Kbytes Page：6 Pages

Quad, Closed-Loop Monolithic Buffer

文件：350.02 Kbytes Page：6 Pages

Quad, Closed-Loop Monolithic Buffer

文件：350.02 Kbytes Page：6 Pages